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. 235-165, 3006550.

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je V i e n R. E., Determining best ordering of variables in casca-,:tching circuits. ((Switching Circuits Theory and Logical Design raquo;, des*



4th Annual Symposium - Special Publ. S-156, oct. 163, , 83-104.

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Mac Sorley O. L., Binary divider, . , . 235-164, 3192364.

a j e s i S., On determination of optimal distributions of carry skips in adders, laquo;1 Trans. Electron. Comput. raquo;, 1967, 16, N 1, . 45-58.

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M a r t i n A. R., R s e n s t e i n A. ., Shiftrix for high-speed multiplication, laquo;1 Trans, on Electron. Comput. raquo;, 1965, vol. EC - 14, N 4. .

McCluskeyE.J., Logical design theory of NOR gate networks with no completented inputs, laquo;1 - Switching circuit Theory and Logical Design*, 4th Annual Symposium - Special Publ. S-156, oct. 1963, . 137-148.

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McLaneG. F., Multioperture plate logic, . , . 340-174, 3253268.

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MendelsonM. J., Apparatu.4 for performing arithmetic operations, . , . 235-155, 3018955.

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Merrill R. D. Jr., Improving digital computer performance using residue number theory, laquo;1 Trans. Electron. Comput raquo; 1964 13, N 2, . 93-101.

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1964, 8, N 4, . 8-9.

Nandi S. K., Krishnamurthy E. V., A simple technique for digital division, laquo;Communs. raquo;, 1967, 10, N 5, . 299- 301.

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Newborn M. M., Propagating logic structures, Nat. Electronics Conference - Proc. 1966, 22, paper 2263, . 731-736.

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1965, 30, N 5, . 317-318.

m a n R. M., Fast multiply system, . , . 235-164, 3192367.

Operateur arithmetique pour calculateur numerique, . ., . G06b. 1376559.

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w e n . .. Improvements in data storage or code conversion arrays, . . . G4A (G06f), 976169.

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